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2.5GHz, +20dBm Power Amplifier IC
in UCSP Package
Typical Operating Characteristics (continued)
(MAX2240 EV kit, V CC = +3.2V, P RFIN = +3dBm, f RFIN = 2.45GHz, SHDN = V CC , T A = +25°C, unless otherwise noted. See Table 1
for power level settings P1, P2, P3, P4.)
S 11
30
20
10
0
-10
HARMONIC OUTPUT SPECTRUM
30
20
10
0
-10
POWER-ON/OFF CHARACTERISTICS
-20
5f 0
-20
-30
-40
f 0
2f 0
3f 0
4f 0
-30
-40
-50
-60
-50
-60
-70
START = 1.0GHz
START = 2400MHz
STOP = 2500MHz
-70
200ns/div
STOP = 13.0GHz
Bump Description
BUMP
C3
C2
C1
B3
B2
B1
A3
A2
A1
NAME
RFIN
V CC
GND2
GND1
SHDN
RFOUT
BIAS
D1
D0
FUNCTION
Power Amplifier RF Input. Internally DC blocked and matched to 50 Ω .
DC Voltage Supply for 1st Stage. A 1.2nH series inductance required for optimum output power and effi-
ciency, followed by an external RF bypass capacitor to ground.
Ground Connection to the Amplifier 2nd Stage. Requires a low-inductance/low thermal resistance path to
the ground plane with multiple vias.
Ground Connection for Bias and 1st Stage. Requires a low-inductance/low thermal resistance path to the
ground plane with multiple vias.
Power Amplifier Shutdown Control Input. Drive SHDN low to enable low-power shutdown mode. Drive SHDN
high for normal operation.
Power Amplifier RF Output. Open-collector output requires external pull-up inductor to V CC . Requires an
external matching network for optimum output power and efficiency.
DC Voltage Supply for Bias and Control Circuitry. An external RF bypass capacitor to ground is required.
Place capacitor as close to the pin as possible.
Digital Power Control Input (MSB) (Table 1)
Digital Power Control Input (LSB) (Table 1)
_______________Detailed Description
The MAX2240 PA is guaranteed to operate over a
2.4GHz to 2.5GHz frequency range with a +2.7V to
+5V single supply. The PA provides a nominal +20dBm
output power in the highest power mode setting (D0 =
D1 = 1). The signal path consists of two amplifier
stages: an input amplifier stage and a PA stage. A
matching circuit is provided between the two stages to
match the amplifiers’ impedance. The PA also contains
bias circuits that interface to external logic commands
(D0, D1, and SHDN ) to control output power and
power-up/down of the amplifier.
The input amplifier is an AC-coupled variable gain
amplifier (VGA) with its input port internally matched to
50 Ω . The amplifier is AC-coupled; hence, a DC block-
ing capacitor is not required at the RFIN port. The VGA
gain is varied by changing the bias current through a
current driver circuit. The current driver circuit provides
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